Understanding Transistor Aging Impact on the Behavior of RRAM Cells

IFIP/IEEE International Conference on Very Large Scale Integration, pp. 1–6

Abstract

Resistive Random Access Memories (RRAMs) have been considered for implementing various emerging applications alongside storage. RRAMs offer the opportunity to address the Von Neumann bottleneck making the implementation of In-Memory Computing (IMC) possible. However, the exploration of RRAM potentials depends on being able to guarantee their reliability during lifetime. In this context, this paper investigates the impact of transistor aging on the behavior of 1T1R RRAM cells. A case study composed of an RRAM block, including peripherals, implemented using the 22 nm FDSOI GF technology is adopted. The obtained results indicate that the transistor aging, which was previously widely ignored, can lead to parametric degradation or even catastrophic faults. In addition, the obtained results show that the transistor type used for implementing the 1T1R RRAM cell, core or IO device, and operating temperature play important roles when analysing aging impact.

Authors 5

1. Seyed Hossein Hashemi Shadmehri Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

2. Supriya Chakraborty Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

3. T. Copetti Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

4. Fabian Luis Vargas

   Leibniz Institute for High Performance Microelectronics

   Affiliation as printed

   IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder),Germany

5. L. M. Bolzani Poehls Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany