Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies
Abstract
Multi-valued logic (MVL), characterized by more than two possible logic states, presents distinct advantages compared to conventional Boolean logic. Novel post-CMOS technologies, particularly memristive and bio-sensitive devices, exhibit compelling attributes that make them promising candidates for realizing MVL computing components. To assess the viability of these devices, we delve into key aspects of Memristive and ISFETs, including their state transition dynamics, multi-level functionality, and compatibility with CMOS manufacturing processes. Through this investigation, we successfully demonstrate the practical implementation of ternary arithmetic MVL gates utilizing memristive and bio-sensitive devices. Our findings affirm that these innovative devices hold the potential to serve as MVL computing elements effectively.
Authors 10
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Indian Institute of Technology Bombay
Affiliation as printed
Department of Electrical Engineering, Indian Institute of Technology Bombay, Forschungszentrum Juelich, India
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Elmira Moussavi Aachen
Affiliation as printed
RWTH Aachen University, Germany
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Christopher Bengel Aachen
Affiliation as printed
RWTH Aachen University, Germany
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Indian Institute of Technology Bombay
Affiliation as printed
Indian Institute of Technology Bombay, India
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Rainer Waser Aachen
Forschungszentrum Jülich · RWTH Aachen University
Affiliation as printed
RWTH Aachen University, Forschungszentrum Juelich, Germany
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Rainer Leupers Aachen
Affiliation as printed
RWTH Aachen University, Germany
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Affiliation as printed
Forschungszentrum Juelich, Germany
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Vivek Pachauri Aachen
Affiliation as printed
RWTH Aachen University, Germany
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Affiliation as printed
Forschungszentrum Juelich, Germany
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Affiliation as printed
Newcastle University, United Kingdom
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