Synthesizable Memory Arrays Based on Logic Gates for Subthreshold Operation in IoT

• Design, Stability Improvement, and Scaling of a 4-Transistor Static Latch for Digital Compute-in-Memory

  2026 Journal of Signal Processing Systems article Engineering Low-power high-performance VLSI design Open access

  0

  citations
• 4T Bitcell for Digital Compute-in-Memory

  2025 IEEE Nordic Circuits and Systems Conference (NorCAS) conference-paper Engineering Low-power high-performance VLSI design

  1

  citations
• A 22nm 96.83-TOPS/W Time-Domain Compute-in-Memory Engine Utilizing Mixed-Fidelity for Edge-AI Applications

  2025 ACM Great Lakes Symposium on VLSI (GLSVLSI) conference-paper Engineering Advanced Memory and Neural Computing Open access

  5

  citations
• A 1.27 fJ/B/transition Digital Compute-in-Memory Architecture for Non-Deterministic Finite Automata Evaluation

  2025 ACM Great Lakes Symposium on VLSI (GLSVLSI) conference-paper Engineering Advanced Memory and Neural Computing Open access

  2

  citations
• An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nm

  2025 conference-paper Engineering Advanced Memory and Neural Computing

  2

  citations
• An Energy Efficient All-Digital Time-Domain Compute-in-Memory Macro Optimized for Binary Neural Networks

  2023 IEEE Transactions on Circuits and Systems I Regular Papers article Engineering Advanced Memory and Neural Computing

  17

  citations
• Fully Digital, Standard-Cell-Based Multifunction Compute-in-Memory Arrays for Genome Sequencing

  2023 IEEE Transactions on Very Large Scale Integration (VLSI) Systems article Biochemistry, Genetics and Molecular Biology Genomics and Phylogenetic Studies cited by 1 patent

  5

  citations
• A 22-nm 1,287-MOPS/W Structured Data-Path Array for Binary Ring-LWE PQC

  2023 IEEE European Solid-State Circuits Conference (ESSCIRC) conference-paper Computer Science Cryptography and Residue Arithmetic

  7

  citations
• Automatic Generation of Structured Macros Using Standard Cells ‒ Application to CIM

  2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) conference-paper Engineering VLSI and FPGA Design Techniques

  11

  citations
• Scalable Time-Domain Compute-in-Memory BNN Engine with 2.06 POPS/W Energy Efficiency for Edge-AI Devices

  2023 ACM Great Lakes Symposium on VLSI (GLSVLSI) conference-paper Engineering Advanced Memory and Neural Computing Open access

  15

  citations
• Lossless Sparse Temporal Coding for SNN-based Classification of Time-Continuous Signals

  2023 Design, Automation, and Test in Europe conference-paper Engineering Advanced Memory and Neural Computing

  8

  citations
• Multi-Function CIM Array for Genome Alignment Applications built with Fully Digital Flow

  2022 IEEE Nordic Circuits and Systems Conference (NorCAS) conference-paper Computer Science Network Packet Processing and Optimization

  8

  citations
• All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks With 1.05 POPS/W Energy Efficiency

  2022 IEEE European Solid-State Circuits Conference (ESSCIRC) conference-paper Engineering Advanced Memory and Neural Computing

  19

  citations
• NEUROTEC I: Neuro-inspired Artificial Intelligence Technologies for the Electronics of the Future

  2022 Design, Automation, and Test in Europe conference-paper Engineering Advanced Memory and Neural Computing

  1

  citations
• Compiling All-Digital-Embedded Content Addressable Memories on Chip for Edge Application

  2021 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems article Computer Science Network Packet Processing and Optimization

  12

  citations

15 results