All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks With 1.05 POPS/W Energy Efficiency

Proceedings of ESSCIRC, pp. 149–152

Abstract

This paper presents an all-digital time-domain compute-in-memory (TDCIM) engine for binary neural networks (BNNs), which is based on commercial standard cells facilitating technology mapping. The proposed TDCIM engine exploits energy-efficient computing principles, supports data reuse and employs double-edge triggered operation. Time domain wave-pipelining technique is also introduced to improve throughput by 1.5x while preserving accuracy. We use Structured Data-Path (SDP) placement and custom routing flow during place and route (P&R) to reduce systematic variations. The measured arrival time of different MAC results is sufficiently bounded to preserve accuracy across PVT variations. Fabricated in a 22nm process, the proposed BNN engine can achieve an energy efficiency of 1.05 POPS/W at 0.5V matching the accuracy of the PyTorch baseline of 99.14% on the MNIST dataset.

Authors 5

1. Jie Lou Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

   Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University, Germany

2. Christian Lanius Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

   Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University, Germany

3. Florian Freye Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

   Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University, Germany

4. Tim Stadtmann Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

   Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University, Germany

5. Tobias Gemmeke Aachen Chair of Integrated Digital Systems and Circuit Design (IDS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany

   Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University, Germany