An Auto-Zero Comparator for Monolithic GaN Power Integration

Conference on Ph.D. Research in Microelectronics and Electronics, pp. 1–4

Abstract

Comparators are vital building blocks for integrated power electronics. Monolithic integration of switches and drivers in high-voltage GaN processes have shown significant performance benefits, while analog circuits still fall behind due to offset and noise. An auto-zero comparator design optimized for propagation delay, noise and offset voltage is proposed. It employs multiple AC-coupled gain stages, which are zeroed sequentially to reduce input referred offset and low-frequency noise. Simulations of the proposed comparator are performed using noise and mismatch models extracted from a physical reference design and manufactured test structures. The proposed design achieves 81 dB of gain with 9.3 ns propagation delay. Monte Carlo and noise simulations yield a 1-σ offset of 1.2 m V and 18.2 µVrmsintegral input noise.

Authors 4

1. Jan Grobe Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Integrated Analog Circuits and RF Systems,Aachen,Germany,D-52074

2. Jonas Zoche Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Integrated Analog Circuits and RF Systems,Aachen,Germany,D-52074

3. Ralf Wunderlich Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Integrated Analog Circuits and RF Systems,Aachen,Germany,D-52074

4. Stefan J. Heinen Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Integrated Analog Circuits and RF Systems,Aachen,Germany,D-52074