January 11, 2025 conference-paper An Improved 3D Systolic Architecture Design Using A Combination of Sub-Array Partitioning and Hierarchical Stacking Methods International Conference on Consumer Electronics DOI: 10.1109/icce63647.2025.10929973 OpenAlex Authors 0 Author list not loaded yet. Cited by 0 stored of 1 References 1 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access Architecture, Dataflow and Physical Design Implications of 3D-ICs for DNN-Accelerators 2021 International Symposium on Quality Electronic Design (ISQED) conference-paper Engineering 3D IC and TSV technologies Open access 12 citations 1 result