A secure hardware-software solution based on RISC-V, logic locking and microkernel

International Workshop on Software and Compilers for Embedded Systems (SCOPES), pp. 62–65

Abstract

In this paper we present the first generation of a secure platform developed by following a security-by-design approach. The security of the platform is built on top of two pillars: a secured hardware design flow and a secure microkernel. The hardware design is protected against the insertion of hardware Trojans during the production phase through netlist obfuscation provided by logic locking. The software stack is based on a trustworthy and verified microkernel. Moreover, the system is expected to work in an environment which does not allow physical access to the device. Therefore, on-the-field attacks are only possible via software. We present a solution whose security has been achieved by relying on simple and open hardware and software solutions, namely a RISC-V processor core, open-source peripherals and an seL4--based operating system.

Authors 6

1. Dominik Šišejković Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University, Germany

2. Farhad Merchant Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University, Germany

3. Lennart M. Reimann Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University, Germany

4. Rainer Leupers Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University, Germany

5. Massimiliano Giacometti

   Hensoldt (Germany)

   Affiliation as printed

   Hensoldt Cyber GmbH, Germany

6. Sascha Kegreiß

   Hensoldt (Germany)

   Affiliation as printed

   Hensoldt Cyber GmbH, Germany