August 23, 2013 article Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories IEEE Transactions on Circuits and Systems I Regular Papers DOI: 10.1109/tcsi.2013.2278332 OpenAlex Authors 0 Author list not loaded yet. Cited by 2 stored of 119 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access Characterization and Test of Intermittent Over RESET in RRAMs 2023 Proceedings - Asian Test Symposium/Proceedings conference-paper Computer Science VLSI and Analog Circuit Testing Open access 2 citations Evaluating the Impact of Process Variation on RRAMs 2021 IEEE Latin American Test Symposium (LATS) conference-paper Engineering Advanced Memory and Neural Computing Open access 15 citations 2 results References 0