Predictive Reliability Modeling for NSFET Optimization---Part II: HCD and BTI

IEEE Transactions on Electron Devices, vol. 73, pp. 4572–4580

Abstract

We propose an extended version of the design technology co-optimization (DTCO) flow, which—in contrast to the commonly acknowledged DTCO paradigm relying on the power–performance–area (PPA) metric—considers reliability as a tangible parameter, thereby leading to a concept of PPAR (“R” stands for “reliability”). As a demonstration of this concept, we carry out a comprehensive reliability analysis of futureimecnanosheet field-effect-transistor (NSFET) logic nodes with gate lengths scaling from 15 to$10{\,}$nm. Our focus is placed on hot-carrier degradation (HCD) and bias temperature instability (BTI) modeling over stress time of up to ten years. For an accurate description of HCD, we employ our technology computer-aided design (TCAD)-based HCD model, which relies on the modeling of carrier transport. A thorough analysis of the electric field and carrier concentration shows that both quantities peak at the rounded nanosheet (NS) corners, which enhances HCD; the most severe HCD occurs in NSFETs with the smallest corner radii. BTI simulations—conducted with the nonradiative multiphonon (NMP) model—exhibit a similar behavior: BTI becomes stronger as the NS corners become sharper. Overall, all degradation metrics decrease monotonically as the NS corner radius increases. These results indicate that field-effect transistor (FET) architectures with larger NS corner radii provide improved robustness against both HCD and BTI, and should be favored for future technology nodes. Our concept allows considering the reliability of future (not yet fabricated) transistor nodes, thereby making reliability an essential DTCO ingredient.

Authors 13

1. Stanislav E. Tyaginov

   IMEC

   Affiliation as printed

   IMEC

2. Ethan Kao

   IMEC

   Affiliation as printed

   IMEC

3. Christoph Jungemann Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University

4. Alexander Makarov

   IMEC

   Affiliation as printed

   IMEC

5. F. M. Bufler

   IMEC

   Affiliation as printed

   IMEC

6. Luca Panarella

   IMEC

   Affiliation as printed

   IMEC

7. Sheng Qiang Yang

   IMEC

   Affiliation as printed

   IMEC

8. Michiel Vandemaele

   IMEC

   Affiliation as printed

   IMEC

9. Maarten L. Van de Put

   IMEC

   Affiliation as printed

   IMEC

10. Geert Hellings

    IMEC

    Affiliation as printed

    IMEC

11. Adrian Vaisman Chasin

    IMEC

    Affiliation as printed

    IMEC

12. B. Kaczer

    IMEC

    Affiliation as printed

    IMEC

13. Michel Houssa

    IMEC

    Affiliation as printed

    IMEC