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Non-idealities and Design Solutions for Analog Memristor-Based Content-Addressable Memories

Abstract

Memristor-based analog Content Addressable Memories (aCAMs) offer robust parallel pattern look-up capabilities, significantly enhancing the scope of In-Memory Computing applications. This paper presents challenges of these analog circuits, which may occur during the inference, and proposes solutions to overcome them. Precisely, we investigate the impact of temperature-dependent behavior, CMOS process variations and memristor telegraph read noise. We demonstrate that one challenging issue affecting memristors analog computing applications, namely telegraph read noise, is not a significant problem in aCAM. We introduce a framework that accounts for these combined distortions to define variability-aware aCAM windows and estimate the bit resolution of a CAM cell. Using this framework we estimate the bit resolution to 2 bits before applying compensating measures and to 4 bits afterwards. We study how variations affect the inference accuracy of the IRIS classification dataset using our novel torchCAM model. We introduce a streamlined aCAM design featuring a memristor comparator for simplified input-to-reference comparison and a novel cell architecture with two symmetrical memristor comparator units.

Authors 4

  1. Forschungszentrum Jülich · RWTH Aachen University

    Affiliation as printed

    Forschungszentrum Jülich GmbH, Peter Grünberg Institut 14, Germany and RWTH Aachen University, Faculty of Electrical Engineering and Information Technology, Germany

  2. Forschungszentrum Jülich

    Affiliation as printed

    Forschungszentrum Jülich GmbH, Peter Grünberg Institut 14, Germany

  3. Forschungszentrum Jülich

    Affiliation as printed

    Forschungszentrum Jülich GmbH, Peter Grünberg Institut 7, Germany

  4. Forschungszentrum Jülich · RWTH Aachen University

    Affiliation as printed

    Forschungszentrum Jülich GmbH, Peter Grünberg Institut 14, Germany and RWTH Aachen University, Faculty of Electrical Engineering and Information Technology, Germany

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References 12

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