February 01, 2021 conference-paper System Level Verification of Phase-Locked Loop using Metamorphic Relations Design, Automation, and Test in Europe DOI: 10.23919/date51398.2021.9474211 OpenAlex Authors 0 Author list not loaded yet. Cited by 1 stored of 5 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing 2024 IEEE Transactions on Circuits and Systems I Regular Papers article Engineering Advanced Memory and Neural Computing 7 citations 1 result References 0