Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
IFIP/IEEE International Conference on Very Large Scale Integration, pp. 1–6
Abstract
In the past decade, a lot of progress has been made in the design and evaluation of logic locking; a premier technique to safeguard the integrity of integrated circuits throughout the electronics supply chain. However, the widespread proliferation of machine learning has recently introduced a new pathway to evaluating logic locking schemes. This paper summarizes the recent developments in logic locking attacks and countermeasures at the frontiers of contemporary machine learning models. Based on the presented work, the key takeaways, opportunities, and challenges are highlighted to offer recommendations for the design of next-generation logic locking.
Authors 5
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Affiliation as printed
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany
[Institute for Communication Technologies and Embedded Systems RWTH Aachen University, Germany]
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Affiliation as printed
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany
[Institute for Communication Technologies and Embedded Systems RWTH Aachen University, Germany]
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Affiliation as printed
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany
[Institute for Communication Technologies and Embedded Systems RWTH Aachen University, Germany]
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Affiliation as printed
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany
[Institute for Communication Technologies and Embedded Systems RWTH Aachen University, Germany]
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Affiliation as printed
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany
RWTH Aachen University
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