January 01, 2020 article Open access Low-Voltage Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS IEEE Open Journal of Circuits and Systems DOI: 10.1109/ojcas.2020.3007393 Full text (OA) OpenAlex Authors 0 Author list not loaded yet. Cited by 1 stored of 18 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access Ultra-low-power CMOS ring oscillator with minimum power consumption of 2.9 pW using low-voltage biasing technique 2024 Open Engineering article Engineering Low-power high-performance VLSI design Open access 3 citations 1 result References 0