DEVICE FOR CONNECTING QUBITS FOR A SEMICONDUCTOR SPIN QUBIT QUANTUM COMPUTER
Abstract
A T-junction for a quantum processor comprises a plurality of gate electrodes arranged on a semiconductor heterostructure. The plurality of gate electrodes comprises first conveyor gates arranged at at least one path and second conveyor gates arranged at a branch. The branch and the at least one path are arranged substantially perpendicular to one another and meet at a junction. The first conveyor gates and second conveyor gates are configured to be supplied with at least one voltage V. The first conveyor gates and second conveyor gates are configured to move at least one qubit, arranged in the semiconductor heterostructure, along the at least one path and/or along the branch, and to divert the at least one qubit from the at least one path into the branch or from the branch into the at least one path.
Inventors 7
- Matthias Künne Aachen author as filed: Künne, Matthias
- Lars R. Schreiber Aachen author as filed: Schreiber, Lars Reiner
- Bluhm, Jörg Hendrik
- Alexander Willmes Aachen author as filed: Willmes, Alexander
- Harsh Bhardwaj Aachen author as filed: Bhardwaj, Harsh
- Eugen Kammerloher Aachen author as filed: Kammerloher, Eugen
- Ran Xue Aachen author as filed: Xue, Ran
Inventors are linked to an Aachen author when surname and first name match exactly one author.
Applicants
- RHEINISCH-WESTFÄLISCHE TECHNISCHE HOCHSCHULE (RWTH) AACHEN RWTH Aachen University
- FORSCHUNGSZENTRUM JÜLICH GMBH
Cited papers 1 in the database
Non-patent literature as cited (6)
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- - LANGROCK LANGROCK VEIT VEIT ET AL: "Blueprint of a Scalable Spin Qubit Shuttle Device for Coherent Mid-Range Qubit Transfer in Disordered Si/SiGe/SiO 2", PRX QUANTUM, 20 October 2022 (2022-10-20), pages 1 - 34, XP093056174, Retrieved from the Internet <URL:https://arxiv.org/pdf/2202.11793v2.pdf> [retrieved on 20230621], DOI: 10.1103/PRXQuantum.4.020305
- - INGA SEIDLER ET AL: "Conveyor-mode single-electron shuttling in Si/SiGe for a scalable quantum computing architecture", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 2 August 2021 (2021-08-02), XP091030215
- - AKITO NOIRI ET AL: "A shuttling-based two-qubit logic gate for linking distant silicon quantum processors", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 3 February 2022 (2022-02-03), XP091319399
- - VEIT LANGROCK ET AL: "Blueprint of a scalable spin qubit shuttle device for coherent mid-range qubit transfer in disordered Si/SiGe/SiO_2", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 23 February 2022 (2022-02-23), XP091164258