METHOD OF OPERATING A SEMICONDUCTOR SPIN QUBIT QUANTUM COMPUTER
Espacenet
Family 85462012
Abstract
A method of operating a quantum processor is disclosed comprising a plurality of gate electrodes arranged on a semiconductor heterostructure, wherein the plurality of gate electrodes is to be supplied with at least one voltage to perform at least one action on at least one qubit arranged in the semiconductor heterostructure.. The method comprises the steps of calibrating the at least one voltage V; determining at least one fidelity F of the quantum processor; analyzing at least one measurement relating to the determining of the fidelities F; identifying at least one fidelity-reducing locus; and adjusting the at least one voltage V.
Inventors 5
- Bluhm, Jörg Hendrik
- Jan Klos Aachen author as filed: Klos, Jan
- Matthias Künne Aachen author as filed: Künne, Matthias
- Max Oberländer Aachen author as filed: Oberländer, Max
- Julian D. Teske Aachen author as filed: Teske, Julian
Inventors are linked to an Aachen author when surname and first name match exactly one author.
Applicants
- FORSCHUNGSZENTRUM JÜLICH GMBH
- RHEINISCH-WESTFÄLISCHE TECHNISCHE HOCHSCHULE (RWTH) AACHEN RWTH Aachen University
Cited papers 2 in the database
Non-patent literature as cited (14)
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- - FABIAN KREPPEL ET AL: "Quantum Circuit Compiler for a Shuttling-Based Trapped-Ion Quantum Computer", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 5 July 2022 (2022-07-05), XP091263794
- - LANGROCK LANGROCK VEIT VEIT ET AL: "Blueprint of a Scalable Spin Qubit Shuttle Device for Coherent Mid-Range Qubit Transfer in Disordered Si/SiGe/SiO 2", PRX QUANTUM, 20 October 2022 (2022-10-20), pages 1 - 34, XP093056174, Retrieved from the Internet <URL:https://arxiv.org/pdf/2202.11793v2.pdf> [retrieved on 20230621], DOI: 10.1103/PRXQuantum.4.020305
- - BRANDON BUONACORSI ET AL: "Simulated coherent electron shuttling in silicon quantum dots", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 29 December 2020 (2020-12-29), XP081847996, DOI: 10.1103/PHYSREVB.102.125406
- - A.M.J. ZWERVER ET AL: "Shuttling an electron spin through a silicon quantum dot array", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 2 September 2022 (2022-09-02), XP091308733
- - BRANDON BUONACORSI ET AL: "Network architecture for a topological quantum computer in silicon", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 26 July 2018 (2018-07-26), XP081040409, DOI: 10.1088/2058-9565/AAF3C4
- - AKITO NOIRI ET AL: "A shuttling-based two-qubit logic gate for linking distant silicon quantum processors", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 3 February 2022 (2022-02-03), XP091319399
- - MATTHIAS K\"UNNE ET AL: "The SpinBus Architecture: Scaling Spin Qubits with Electron Shuttling", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 28 June 2023 (2023-06-28), XP091549565
- - INGA SEIDLER ET AL: "Conveyor-mode single-electron shuttling in Si/SiGe for a scalable quantum computing architecture", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 2 August 2021 (2021-08-02), XP091030215
- - FABIAN KREPPEL ET AL: "Quantum Circuit Compiler for a Shuttling-Based Trapped-Ion Quantum Computer", ARXIV.ORG CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 5 July 2022 (2022-07-05), XP091263794