RWTH-OS/eduOS-rs: Latest Stage0 Release

Zenodo (CERN European Organization for Nuclear Research)

Abstract

add basic riscv64 support Mirror the aarch64 port for RISC-V 64: the kernel boots on QEMU's virt machine (in M-mode with -bios none) and uses ARM-compatible semihosting for console output and shutdown. riscv64-eduos.json: custom RV64IMAC target spec src/arch/riscv64: boot assembly, startup, serial and shutdown via the semihosting crate, plus a linker script placing the kernel at the start of RAM (0x80000000) wire riscv64 into arch/mod.rs, lib.rs and Cargo.toml .cargo/config.toml: linker script + qemu-system-riscv64 runner CI: build and clippy-check the riscv64 target Run with: cargo run --target riscv64-eduos.json

Authors 3

1. Stefan Lankes Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University

2. Jens Breitbart
   Affiliation as printed

   AMD

3. Martin Kröning Aachen @RWTH-ACS

   RWTH Aachen University

   Affiliation as printed

   @RWTH-ACS