ArchE-Q: A DSP-Free Dataflow Accelerator for Quantized Neural Networks in Sensor-Aided Millimeter-Wave Edge Connectivity

Abstract

Sensor-aided wireless edge applications, such as LiDAR-based beam prediction for millimeter-wave communications, demand intelligent on-device processing of high-volume sensor data. However, the computational cost of machine learning models often exceeds the tight power and resource constraints of edge hardware. While quantized neural networks (QNNs) reduce resource requirements, typical FPGA accelerators still rely on power-hungry digital signal processing (DSP) slices and incur avoidable data-movement overheads. To bridge this gap, we propose ArchE-Q, a dataflow accelerator for QNNs combined with efficient data preprocessing. Our design is fundamentally multiplier-less, utilizing: (1) an application-specific first-layer kernel that exploits binarized sensor inputs to remove multipliers; (2) the eXtended Vector Activation Unit (XVAU), fusing convolution, activation, and pooling to reduce buffering and data transfers; and (3) memory-centric buffering for efficient data reuse. Implemented on a Xilinx ZCU104 FPGA, ArchE-Q achieves 13.3% lower latency and up to 28% lower dynamic power than the FINN-R baseline, while eliminating DSP usage.

Authors 3

1. Arish Sateesan Aachen Institute of Networked Systems (iNETS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Institute of Networked Systems,Aachen,Germany

2. Ljiljana Simić Aachen Institute of Networked Systems (iNETS)

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Institute of Networked Systems,Aachen,Germany

3. Marina Petrova Aachen

   RWTH Aachen University

   Affiliation as printed

   RWTH Aachen University,Mobile Communications and Computing,Aachen,Germany