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Coupled Simulation Methodology for In-Memory Computing Systems

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 12, pp. 18–26

Abstract

Simulations for the development and optimisation of future in-memory computing systems often face the problem that the modelling of the large system is desired, but at the same time the effects at the device level, should also be taken into account. Such effects could be due to the material properties and geometries of the nanoscale structures, which are too time-consuming to model in a system-level simulation. For certain problems and applications, however, it is advantageous or even essential that a high-level model responds to the details of a low-level model. In this paper, we present a coupled simulation methodology to overcome this challenge. In a case study, we show the integration of a material-level memristor simulation, serving as a vector matrix multiplication unit, into a system-level simulation. The simulation process between two distributed simulators is controlled by a co-simulation interface which we present here. With this co-simulation approach, devices and circuits can be optimized for their application, for example, with regard to energy efficiency. It can also be extended to a multi-level simulation flow.

Authors 5

  1. RWTH Aachen University

    Affiliation as printed

    Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Aachen, Germany

  2. RWTH Aachen University

    Affiliation as printed

    Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Aachen, Germany

  3. RWTH Aachen University

    Affiliation as printed

    Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Aachen, Germany

  4. Forschungszentrum Jülich

    Affiliation as printed

    Peter Grünberg Institut (PGI-7), Forschungszentrum Jülich GmbH, Jülich, Germany

  5. RWTH Aachen University

    Affiliation as printed

    Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Aachen, Germany

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References 24