Linear and efficient phase-only multilevel LINC transmitter architecture
RWTH Publications (RWTH Aachen)
Abstract
Modern wireless communication standards require the transmitter circuits to be highly linear. At the same time, the transmitter circuits are required to be highly power-efficient to lower the power consumption of the equipment. This research work investigates the Phase-Only Multilevel LINC (PO-MLINC) architecture, which combines linear and power-efficient signal transmission with phase-only control. At it's core, the architecture linearises Chireix power amplifiers using the Multilevel LINC concept. The PO-MLINC architecture is investigated at different levels of abstraction. System-level simulations and analyses are performed. A four-way CMOS phase-modulator chip is developed as a signal generator for the PO-MLINC architecture, focusing on the study of selected nonidealities in the outphasing context. A CMOS Chireix outphasing PA chip is designed to serve as the level-generator in the PO-MLINC architecture. Finally, two PO-MLINC transmitter prototypes are implemented. This work demonstrates the PO-MLINC operation and provides analyses for a broad range of system design parameters.
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