Hardware Acceleration of Cryptographic Algorithms

Abstract

This chapter discusses the use of hardware platforms for the implementation of cryptographic algorithms. While most traditional cryptographic algorithms can be implemented in software on general-purpose microprocessors, there are applications that require cryptographic algorithms to be implemented in hardware. The most popular programmable hardware platform is a field-programmable gate array (FPGA). An FPGA is a regular structure of configurable cells with configurable routing in between the cells. The chapter discusses the implementations of the most frequently used public-key cryptosystems such as RSA and elliptic curve cryptography (ECC), with a focus on the most critical operations that are modular exponentiation and modular multiplication. When designing hardware circuits for RSA and ECC, designers focus on implementing the basis operations such as modular arithmetic for integers bigger than 16 bytes or modular exponentiation for RSA or elliptic curve point addition or scalar multiplication.

Authors 3

1. Lejla Batina

   Radboud University Nijmegen

   Affiliation as printed

   Radboud University, Nijmegen, Netherlands

2. Pedro Maat C. Massolino

   PQShield (United Kingdom)

   Affiliation as printed

   PQShield, Oxford, United Kingdom

3. Nele Mentens Aachen

   Leiden University · KU Leuven

   Affiliation as printed

   KU Leuven, Belgium

   Leiden University, Netherlands