A general tree-based machine learning accelerator with memristive analog CAM
IEEE International Symposium on Circuits and Systems proceedings, pp. 220–224
Abstract
Deep learning models have reached high accuracy in multiple classification tasks. However these models lack explainability, namely the capability of understanding why a certain class is chosen along with the class predicted. On the other hand, tree-based models are top performers in several applications, particularly when the training set is limited, while also being more explainable. However, tree-based models are difficult to accelerate with conventional digital hardware due to irregular memory access patterns. Here we show a tree-based ML accelerator based on a novel analog content addressable memory with memristor devices, capable of handling multiple types of bagging and boosting techniques common in tree-based algorithms. Our results show a large improvement of $\sim 60 \times $ lower latency and $160 \times $ reduced energy consumption compared to the state of the art, demonstrating the promise of our accelerator approach.
Authors 4
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Hewlett-Packard (United States) · Hewlett Packard Enterprise (United States)
Affiliation as printed
Hewlett Packard Enterprise,Hewlett Packard Labs,Milpitas,CA,USA
Hewlett Packard Labs, Hewlett Packard Enterprise, Milpitas, CA, USA
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Hewlett-Packard (United States) · Hewlett Packard Enterprise (United States)
Affiliation as printed
Hewlett Packard Enterprise,Hewlett Packard Labs,Milpitas,CA,USA
Hewlett Packard Labs, Hewlett Packard Enterprise, Milpitas, CA, USA
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Affiliation as printed
Jülich, Germany and RWTH Aachen University,Peter Grünberg Institute (PGI-14), Forschungszentrum Jülich GmbH,Aachen,Germany
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Hewlett-Packard (United States) · Hewlett Packard Enterprise (United States)
Affiliation as printed
Hewlett Packard Enterprise,Hewlett Packard Labs,Milpitas,CA,USA
Hewlett Packard Labs, Hewlett Packard Enterprise, Milpitas, CA, USA
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