Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques
IEEE Transactions on Electron Devices, vol. 68, pp. 4373–4378
Abstract
In-memory computing (IMC) is receiving considerable interest for accelerating artificial intelligence (AI) tasks, such as neural network training and inference. However, IMC can also accelerate other machine learning (ML) and scientific computing problems, such as recommendation systems, regression, and PageRank, which are ubiquitous in datacenters. These applications typically have higher precision requirements than neural networks, which can challenge analog-based IMC and sacrifice some of the expected energy efficiency benefits. In this article, we address these challenges experimentally, presenting new techniques improving the accuracy of the solution of linear algebra problems, such as eigenvector extraction for PageRank, in a fully integrated circuit (IC) with analog resistive random access memory (RRAM) devices. Our custom redundancy algorithm can improve the programming accuracy by using multiple memory devices for representing a single matrix entry. Accuracy is further improved by error compensation with analog slicing, which allows an ever more precise value representation.
Authors 6
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Hewlett-Packard (United States)
Affiliation as printed
Hewlett Packard Labs, Milpitas, CA, USA
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Affiliation as printed
Dipartimento di Elettronica Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy
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Affiliation as printed
Department of Electrical and Electronic Engineering, The University of Hong Kong (HKU), Hong Kong, SAR, China
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Affiliation as printed
Institute for Artificial Intelligence and Microelectronics, Peking University (PKU), Beijing, China
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John Paul Strachan Aachen
Forschungszentrum Jülich · RWTH Aachen University
Affiliation as printed
Peter Grünberg Institute (PGI-14), Forschungszentrum Jülich, Jülich, Germany
RWTH Aachen University, Aachen, Germany
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Affiliation as printed
Dipartimento di Elettronica Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy
Cited by 26 stored of 26
Cited by patents worldwide 2 (Lens.org)
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Redundant Computations using Integrated Circuit Devices having Analog Inference CapabilityUS20240086696A1 2024-03-14 Pending
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Memristor array-based PageRank algorithm hardware circuit implementation methodCN114664350A 2022-06-24 Active