Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware
Microprocessors and Microsystems, vol. 78, pp. 103208
Abstract
Dynamic logic reconfiguration is a concept that allows for efficient on-the-fly modifications of combinational circuit behavior in both ASIC and FPGA devices. The reconfiguration of Boolean functions is achieved by modification of their generators (e.g., shift register-based look-up tables) and it can be controlled from within the chip, without the necessity of any external intervention. This hardware polymorphism can be utilized for the implementation of side-channel attack countermeasures, as demonstrated by Sasdrich et al. for the lightweight cipher PRESENT. In this work, we adapt these countermeasures to two of the AES finalists, namely Rijndael and Serpent. Just like PRESENT, both Rijndael and Serpent are block ciphers based on a substitution–permutation network. We describe the countermeasures and adjustments necessary to protect these ciphers using the resources available in modern Xilinx FPGAs. We describe our implementations and evaluate the side-channel leakage and effectiveness of different countermeasures combinations using a methodology based on Welch’s t-test. Furthermore, we attempt to break the protected AES/Rijndael implementation using second-order DPA/CPA attacks. We did not detect any significant first-order leakage from the fully protected versions of our implementations. Using one million power traces, we detect second-order leakage from Serpent encryption, while AES encryption second-order leakage is barely detectable. We show that the countermeasures proposed by Sasdrich et al.are, with some modifications, successfully applicable to AES and Serpent.
Authors 5
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Petr Socha corresponding
Czech Technical University in Prague
Affiliation as printed
Czech Technical University in Prague, Faculty of Information Technology, Czech Republic
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Czech Technical University in Prague
Affiliation as printed
Czech Technical University in Prague, Faculty of Information Technology, Czech Republic
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Affiliation as printed
KU Leuven, eMedia lab, Belgium
KU Leuven, imec-COSIC/ESAT, Belgium
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Czech Technical University in Prague
Affiliation as printed
Czech Technical University in Prague, Faculty of Information Technology, Czech Republic
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Nele Mentens Aachen
Leiden University · IMEC · KU Leuven
Affiliation as printed
KU Leuven, ES&S, Belgium
KU Leuven, imec-COSIC/ESAT, Belgium
Leiden University, LIACS, The Netherlands
Cited by 8 stored of 8
8 results
Cited by patents worldwide 3 (Lens.org)
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METHODS, UNIT AND DEVICE FOR SUCCESSIVELY EXECUTING FIRST AND NEXT BLOCK CRYPTOGRAPHIC COMPUTATIONSEP4498631B1 2026-02-18 Active
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METHODS, UNIT AND DEVICE FOR CONCURRENTLY EXECUTING FIRST AND SECOND BLOCK CRYPTOGRAPHIC COMPUTATIONSEP4498630A1 2025-01-29 Pending
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METHODS, UNIT AND DEVICE FOR SUCCESSIVELY EXECUTING FIRST AND NEXT BLOCK CRYPTOGRAPHIC COMPUTATIONSEP4498631A1 2025-01-29 Active