Scaling Shared Memory Multiprocessing Applications in Non-cache-coherent Domains
ACM International Systems and Storage Conference (SYSTOR), pp. 13–24
Abstract
Due to the slowdown of Moore's Law, systems designers have begun integrating non-cache-coherent heterogeneous computing elements in order to continue scaling performance. Programming such systems has traditionally been difficult - developers were forced to use programming models that exposed multiple memory regions, requiring developers to manually maintain memory consistency. Previous works proposed distributed shared memory (DSM) as a way to achieve high programmability in such systems. However, past DSM systems were plagued by low-bandwidth networking and utilized complex memory consistency protocols, which limited their adoption. Recently, new networking technologies have begun to change the assumptions about which components are bottlenecks in the system. Additionally, many popular shared-memory programming models utilize memory consistency semantics similar to those proposed for DSM, leading to widespread adoption in mainstream programming.
Authors 4
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Affiliation as printed
Virginia Tech, USA
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Affiliation as printed
Virginia Tech, USA
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Stefan Lankes Aachen
Affiliation as printed
RWTH Aachen University, Germany
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Affiliation as printed
Virginia Tech, USA
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