May 08, 2020 article Logic Obfuscation Through Enhanced Threshold Voltage Defined Logic Family IEEE Transactions on Circuits & Systems II Express Briefs DOI: 10.1109/tcsii.2020.2993447 OpenAlex Authors 0 Author list not loaded yet. Cited by 1 stored of 8 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic 2023 IEEE Interregional NEWCAS Conference (NEWCAS) conference-paper Computer Science Physical Unclonable Functions (PUFs) and Hardware Security 3 citations 1 result References 0