June 01, 2018 conference-paper 2.9TOPS/W Reconfigurable Dense/Sparse Matrix-Multiply Accelerator with Unified INT8/INTI6/FP16 Datapath in 14NM Tri-Gate CMOS IEEE Symposium on VLSI Circuits (VLSI-Circuits) DOI: 10.1109/vlsic.2018.8502333 OpenAlex Authors 0 Author list not loaded yet. Cited by 2 stored of 24 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access A Unified and Energy-Efficient Depthwise Separable Convolution Accelerator 2024 IFIP advances in information and communication technology conference-paper Computer Science Advanced Neural Network Applications 0 citations An Energy-Efficient and Area-Efficient Depthwise Separable Convolution Accelerator with Minimal On-Chip Memory Access 2023 IFIP/IEEE International Conference on Very Large Scale Integration conference-paper Computer Science Advanced Neural Network Applications 7 citations 2 results References 0