June 13, 2017 conference-paper Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs DOI: 10.1145/3061639.3062207 OpenAlex Authors 0 Author list not loaded yet. Cited by 2 stored of 426 Search Sort Most cited Newest Oldest Patent citations Title Any typearticle review book-chapter conference-paper preprint dissertation book dataset other Any fieldAgricultural and Biological Sciences Arts and Humanities Biochemistry, Genetics and Molecular Biology Business, Management and Accounting Chemical Engineering Chemistry Computer Science Decision Sciences Dentistry Earth and Planetary Sciences Economics, Econometrics and Finance Energy Engineering Environmental Science Health Professions Immunology and Microbiology Materials Science Mathematics Medicine Neuroscience Nursing Pharmacology, Toxicology and Pharmaceutics Physics and Astronomy Psychology Social Sciences Veterinary Open access GUPrecision: Group-Wise Uniform Precision Accelerator for Depthwise Separable Convolution using Hardware-Algorithm Co-Design 2026 ACM Great Lakes Symposium on VLSI (GLSVLSI) conference-paper Computer Science Advanced Neural Network Applications Open access 1 citations FPGA-based Deep Learning Inference Accelerators: Where Are We Standing? 2023 ACM Transactions on Reconfigurable Technology and Systems article Computer Science Embedded Systems Design Techniques Open access 73 citations 2 results References 0