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December 01, 2012 conference-paper

A low-power all-digital PLL architecture based on phase prediction

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

DOI: 10.1109/icecs.2012.6463539 OpenAlex

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System-level model of a two-step locking technique applied in an all-digital Phase-locked loop
2022 International Conference on Modern Circuits and Systems Technologies conference-paper Engineering Advancements in PLL and VCO Technologies

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