METHOD AND APPARATUS FOR SECURE PROCESSING WHEN USING A HARDWARE CALCULATION UNIT
Abstract
[0001] A method and apparatus for secure processing of matrix multiplication using a hardware calculation unit (31; 63) as well as a corresponding apparatus and computer program is disclosed. The method for secure processing of a matrix multiplication using a hardware calculation unit (31; 63) adapted to perform matrix multiplications comprises receiving (S1) a matrix, encrypting (S2) the matrix by generating a permuted matrix by permuting the rows or the columns of the matrix with a first permutation vector, writing (S3) the permuted matrix to storage elements of the hardware calculation unit (31; 63) adapted to perform matrix multiplications, receiving (S4) an input vector which is to be multiplied with the matrix, and performing (S5) a matrix multiplication using the input vector and the hardware calculation unit (31; 63), wherein an output of the calculation provided by the hardware calculation unit (31; 63) is decrypted by applying an inverse of the first permutation vector to either the input vector or the output of the hardware calculation unit (31; 63).
Inventors 2
- Galicia Cota, Melvin Estuardo
- Galicia, Cota Melvin Estuardo
Inventors are linked to an Aachen author when surname and first name match exactly one author.
Applicants
- Rheinisch-Westfälische Technische Hochschule (RWTH) Aachen RWTH Aachen University
Cited papers 1 in the database
Non-patent literature as cited (3)
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